@amarioguy@social.treehouse.systems
2026-09-26 19:01 UTC
@mcc@mastodon.social @ireneista@adhd.irenes.space @MaddieM4@raphus.social right, but an open ISA is not the same thing as being able to create silicon with said ISA, for a truly open chip, we do need people who can fabricate said silicon, is more my point
also RISC-V is evolving, usually according to how big companies want it, it's not like RISC-V stood still and just froze, there's a lot of funky stuff being added to it (M-mode being my usual example, it reeks of "intel SMM" levels of mistakes personally)
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@ireneista@adhd.irenes.space 2026-09-26 19:08
@amarioguy@social.treehouse.systems @mcc@mastodon.social @MaddieM4@raphus.social one hopeful note in our experience when a company is very big on having NDAs around its tooling, it's because there's nothing hard to replicate about the tooling itself, once you know the basic idea of it we suspect people who do chip design can already basically say, yeah you need these specific types of simulator to eliminate whatever specific classes of problem that seems like a thing the community could take on, in principle