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William D. Jones

cr1901@mastodon.social

<p>Another important fact about me is that I collect ISA cards. I still don&#39;t believe in magic- just concepts I don&#39;t understand yet.</p><p><a href="http://pronoun.is/he/him" target="_blank" rel="nofollow noopener" translate="no"><span class="invisible">http://</span><span class="">pronoun.is/he/him</span><span class="invisible"></span></a></p>

Posts

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    #lazyweb Can someone give me some good 7-letter magic hex constants? E.g. 0xdeadbee... huh... I guess that works. Must be exactly seven letters.

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    https://archive.org/details/commonsenseappro0000araz Someone who an an Archive acct... I currently have borrowed this book for 14 days. Can anyone else borrow it rn? The 14 day borrow is convenient since I prob will read the whole thing in that time frame, and don&#39;t feel like renewing every hour. But I also don&#39;t wanna be a asshole if that&#39;s the only copy.

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    #lazyweb Can anyone recommend a slop-free static site generator? Preferably in Rust or Python?

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    Oh God Fucking Damn It!! https://github.com/pytest-dev/pytest/commit/052156d3648a56c0ea554f395c44f48ba48acf64

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    (This is NOT RISC-V bashing. I don&amp;#39;t know enough about vector code to have an opinion): https://www.reddit.com/r/RISCV/comments/1229ygt/comment/jdqy5hw/ &amp;gt; RISC-V is very different in this respect: the best specialists on the planet are getting together to design the RISC-V ISA, and decades of lessons learned are taken into account in its design. Okay. Then why does basically everyone I talked to, who I think are competent software engineers, hate the V spec?

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    RE: https://urusai.social/@thepi/116559128285078035 This is how I figure out that I can type the name of one of my computers without the &amp;quot;.lan&amp;quot; TLD into my web browser, press Enter, and it Just Works*. * If I spun up an http server on said machine.

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    I am SO Goddamn tired of this timeline...

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    I have released Sentinel v0.1.0-beta.2. Sentinel is my microcoded RISC-V CPU core written in Amaranth. It fits in ~1000 LUTs and ~400 FFs on an ice40 FPGA, and implements RV32I_Zicsr and the Machine Mode privileged spec, and passes the RISCOF and RISC-V Formal test suites. Ready-to-use Verilog is available here: https://codeberg.org/cr1901/sentinel/releases/tag/v0.1.0-beta.2 Sentinel is also available on PyPI now: https://pypi.org/project/sentinel-cpu/ If you wish to play with the source, fo...

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    All of Sentinel&amp;#39;s CI has been ported to Forgejo actions. Of course, I haven&amp;#39;t gotten a full run to complete because the next ice age will happen before I&amp;#39;m actually being picked up by the runners after I had to restart b/c apt install was throttled to kilobytes and eating up 5 of 10 minutes of my compute time. I&amp;#39;ve said it before, I&amp;#39;ll say it again: FUCK. CONTINUOUS. INTEGRATION.

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    Anyone else on Codeberg using codeberg-medium runners (i.e. Forgejo Actions, not Woodpecker)... are you able to get jobs onto the medium runners today? Mine all seem to be stuck...

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    I have new wrinkles under my eyes after that week of CI hell. Wonder if I have my first grey hairs now too...

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    Public service idea: Send me your floppy disks for postage (to and from), and I&amp;#39;ll send you the files via email or temporary storage (if I can read them).

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    https://code.forgejo.org/forgejo/runner/pulls/1388 At least this is a legitimate bug (Codeberg uses v12.6.3), and not me losing my grasp on real- oh, who am I kidding?

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    Mom just told me about this... Oh My God, It Was A Real Thing ._. ... https://en.wikipedia.org/wiki/Rabbit_test

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    msp430 Rust probably isn&amp;#39;t gonna last much longer... I don&amp;#39;t have the bandwidth to fix the gcc port (rustc calls the compiler driver for linking) or to add lld support. Fun while it lasted, but not enough ppl care about the 16-bits. That includes myself at this point. It&amp;#39;s just too much work that I&amp;#39;m unwilling to put in without help. I hate how much we collectively focus on depth instead of breadth now. Now only x86 and ARM get the love.

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    Finally, Sentinel can get a release after I update the CHANGELOG... and immediately I can work on the next release :P.

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    Very good day for working on Sentinel. I cut a release (don&amp;#39;t use it), and basic Forgejo CI is working. I&amp;#39;m even uploading to TestPyPI now! I think I&amp;#39;ll have to wait until larger runners are available to enable CI fully though.

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    &amp;quot;There&amp;#39;s no such thing as a Nintendo&amp;quot; ad, but it reads &amp;quot;There&amp;#39;s no such thing as a Codeberg CI&amp;quot;: https://codeberg.org/actions/meta#what-is-forgejo-actions

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    #lazyweb I have a FreeBSD VPS... one of the daemons crashes once every 2 weeks (interval that I update packages). What is the correct way to add a &amp;quot;debug mode&amp;quot; to the rc script so that I can diagnose why it crashes (nothing seems to be in /var/log/messages)?