@hanshuebner@mastodon.social I think @brouhaha@mastodon.social had the right idea. The SystemVerilog source file included mentions a "DCJ11 TangNano interface by nanja.info [...] PSRAM interface module [...] 4MB RAM" in ram.sv. The top.sv module is connected to: DAL, BS, AIO (J11 side, data/addresses multiplexed) and Apple II Data D, Apple II /IOSEL, Apple II R/W plus the PSRAM. There also seems to be peripheral emulation (or addr. decoding) for a DLART and a PC11. Now where do I find a J11 module? 😀